The invention relates to an optimized topography of an intelligent industrial I/O controller system capable of being accommodated in a single slot space of a VMEbus back plane and capable of achieving I/O (input/output) speeds much higher than can be accomplished via the VMEbus for a large number of I/O channels using one double Eurocard PC (printed circuit) board structure.
Complex computing devices that include a powerful microprocessor such as a Motorola 68000, large amounts of electrically programmable read-only memory (EPROM), high speed static random access memory (SRAM), dynamic RAM (DRAM), interrupt handling circuitry, interrupt generating circuitry and a large number of channels of digital and/or analog I/O capability are sometimes referred to as "intelligent industrial I/O controllers", hereinafter simply "industrial I/O controllers". Such industrial I/O controllers are manufactured and marketed as multiple layer PC boards by various concerns. Users purchase the industrial I/O controllers and plug them into printed circuit board racks attached to a back plane with a standard bus thereon, such as the well-known VMEbus The more complex industrial I/O controllers of the type mentioned include two or more printed circuit boards which are plugged into the VMEbus back plane. A large number of customers who would buy an industrial I/O controller are faced with fixed space requirements. That is, the electronic portion of their product must fit into a predetermined small space.
At the present state-of-the-art, it is impossible to provide a system as complex as an intelligent industrial I/O controller on a single printed circuit board, such as a so-called double Eurocard, which is approximately 9 by 6 inches, because it is impossible to provide all of the integrated circuit (IC) functions required in a state-of-the-art industrial I/O controller on a single printed circuit board of the required size. Even when the most recent multilayer PC board technology and the most recently available LSIC (large scale integrated circuit) components are utilized, currently available industrial I/O controllers require at least two "slot spaces" of a bus back plane. A slot space for a VMEbus is approximately 0.8 inches thick.
FIG. 5A illustrates a typical configuration for an industrial I/O controller. Numeral 11 represents a so-called VMEbus. Numeral 71 designates a printed circuit board containing a CPU or microprocessor, such as a Motorola 68000 microprocessor, and also contains large amounts of DRAM, SRAM, and EPROM. A bidirectional bus 72 connects the CPU board 71 to the VMEbus 11. The industrial I/O controller includes a second PC board 73 that contains a large amount of I/O circuitry, such as multiplexers, sample and hold circuits, analog-to-digital converters, digital-to-analog converters, digital drivers, digital receivers, latches, input buffers, output buffers, and control logic circuitry. I/O board 73 is connected by bidirectional bus 74 to VMEbus 11. A plurality of input channels 76 and a plurality of output channels 75, which can be analog and/or digital channels, are connected to I/O board 73. A shortcoming of the system described in FIG. 5A is that it requires two slots of the VMEbus back plane 11. Another problem is that communications between the CPU board 71 and the I/O board 73 must take place through the VMEbus 11. The VMEbus 11 does not permit data exchange rates in excess of 20 megabytes per second. Furthermore, whenever information is being exchanged between the CPU board 71 and the I/O board 73, the VMEbus 11 is unavailable to other printed circuit boards in the system, greatly slowing down the overall system operating speed.
Another possible approach to the problem is illustrated in FIG. 5B, wherein a local bus 77 connects the CPU board 71 and the I/O board 73, allowing much higher rates of data exchange between the CPU board 71 and the I/O board 73. This technique makes the VMEbus 11 available to the rest of the system during data exchanges between CPU board 71 and I/O board 73, and permits the data exchange between CPU board 71 and I/O board 73 to occur at much higher speeds than could be achieved by the system of FIG. 5A. Unfortunately, the physical size of I/O board 73 is such that it must occupy a "slot space" of the VME back plane 111 even though it is not actually plugged into the VMEbus because the slots of the VME back plane 11 are so close together that I/O board 73 blocks the VMEbus connector next to the one CPU board 71 is plugged into, so no other PC board can be plugged into that slot.
FIG. 5C shows what would be an ideal solution, wherein all of the functions of the industrial controller system, including the CPU circuitry 71A and all of the I/O circuitry 73A, are included on a single PC board 71A that requires only a single VMEbus slot and slot space. However, until now, it has been impossible to provide the system shown in FIG. 5C on a single PC board the size of a double Eurocard if it is to have the above-described capabilities.
Those skilled in the art know that the most severe constraints faced in designing a high density printed circuit board are the limited amount of area on the component side of the printed circuit board, the number of IC packages, other components, and connectors that must be located in that area, and the number of interconnections required between various leads of the integrated circuits, other components, and connectors that are to be plugged into or soldered onto the printed circuit board. The lengths of interconnection conductors must be minimized to reduce their capacitance and thereby increase operating speeds. Some of the numerous design constraints faced by a PC board system designer include specifications for minimum widths and spacings of copper conductors or "lines", the number of two-sided layers that can be economically laminated together to form a multiple layer printed circuit board, the maximum permissable lengths of certain individual conductors, the locations of edge connectors dictated by other system constraints, the fact that copper lines (sometimes referred to herein as "traces" or "lines") on the same surface cannot cross over one another, the need to minimize capacitive cross-coupling between certain conductors, and the locations and sizes of certain areas of the PC board which must free be free of copper, e.g., for bolts and nuts and a border along edges of the PC board.
After a block diagram of the system showing the required components, connectors, integrated circuits and their lead interconnections has been completed, computer aided design (CAD) systems are used to generate a diagram that is sometimes referred to as a "rat's nest", which shows all of the straight line connections between the leads of components, etc. of the block diagram. This rat's nest diagram is used to show the density of interconnections between particular integrated circuits. Although such rat's nest diagrams are very helpful, many hours of effort nevertheless usually are required for a system designer to select suitable LSI chips and locate them (often by trial and error) on the component side of the printed circuit board, because there is a very large number of possibilities for routing the various conductors and for placement of the various LSI chips. Selecting an optimum topography for a high density PC board often taxes the skill and ingenuity of even the most resourceful system designers and printed circuit board designers, and is far beyond the capability of the most sophisticated computer aided design programs yet available.